MCQEasyJEE 2025Logic Gates

JEE Physics 2025 Question with Solution

Logic circuit with inputs A and B feeding two NOT gates and two AND gates, whose outputs go to gate G and final output Y, alongside a truth table for A, B, and Y.

To obtain the given truth table, the following logic gate should be placed at GG:

  • A

    AND Gate

  • B

    OR Gate

  • C

    NOR Gate

  • D

    NAND Gate

Answer

Correct answer:C

Step-by-step solution

Standard Method

Given: A logic circuit with inputs AA and BB, intermediate NOT and AND gates, an unknown gate GG, and a truth table for output YY.

Find: Which logic gate must be placed at GG to obtain the given truth table.

Step 1: Analyze the circuit structure.

  • The circuit consists of two NOT gates applied to AA and BB, followed by two AND gates whose outputs feed into gate GG.
  • From the given truth table, YY is high for (A,B)=(0,0)(A,B)=(0,0) and (1,1)(1,1), but low otherwise.

Step 2: Identify the logical expression. Observing the output pattern, the solution identifies the output as

Y=A+BY = \overline{A + B}

Step 3: Match with the gate. The gate that gives

Y=A+BY = \overline{A + B}

is the NOR gate.

Therefore, the correct option is C.

Truth Table Match

Given: The unknown gate GG must produce the shown output truth table.

Find: The name of the gate at GG.

Step 1: Recall the behavior of a NOR gate. A NOR gate gives output 11 only when all inputs are 00. Otherwise, the output is 00.

Step 2: Compare with the standard NOR truth table:

  • A=0,B=0Y=1A=0, B=0 \Rightarrow Y=1
  • A=0,B=1Y=0A=0, B=1 \Rightarrow Y=0
  • A=1,B=0Y=0A=1, B=0 \Rightarrow Y=0
  • A=1,B=1Y=0A=1, B=1 \Rightarrow Y=0

This matches the NOR pattern stated in the solution approach.

Therefore, the required gate is the NOR Gate, so the correct option is C.

Common mistakes

  • Confusing NOR with OR. OR gives output 11 when at least one input is 11, whereas NOR is the complement of OR. Always check whether the output is inverted.

  • Ignoring the effect of the NOT gates before gate GG. The intermediate inputs to GG may already be complemented, so trace the circuit stage by stage before choosing the final gate.

  • Choosing NAND because it is also a universal gate. NAND corresponds to AB\overline{AB}, not A+B\overline{A+B}. Write the Boolean expression explicitly before matching the gate.

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