MCQEasyJEE Main 2023 · 30 January, Shift 2Logic Gates

Physics Question from JEE Main 2023 · 30 January, Shift 2

The output YY for the inputs AA and BB of the circuit is given by:

Logic gate circuit with inputs A and B feeding a network of NAND gates and final output Y.
  • A

    ABY001011101110\begin{array}{c|c|c}A & B & Y \\ \hline 0 & 0 & 1 \\ 0 & 1 & 1 \\ 1 & 0 & 1 \\ 1 & 1 & 0\end{array}

  • B

    ABY001010100111\begin{array}{c|c|c}A & B & Y \\ \hline 0 & 0 & 1 \\ 0 & 1 & 0 \\ 1 & 0 & 0 \\ 1 & 1 & 1\end{array}

  • C

    ABY000011101111\begin{array}{c|c|c}A & B & Y \\ \hline 0 & 0 & 0 \\ 0 & 1 & 1 \\ 1 & 0 & 1 \\ 1 & 1 & 1\end{array}

  • D

    ABY000011101110\begin{array}{c|c|c}A & B & Y \\ \hline 0 & 0 & 0 \\ 0 & 1 & 1 \\ 1 & 0 & 1 \\ 1 & 1 & 0\end{array}

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