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MCQEasyJEE Main 2023 · 30 January, Shift 1Logic Gates

Physics Question from JEE Main 2023 · 30 January, Shift 1

The output waveform of the given logical circuit for the following inputs AA and BB is shown below:

Logical circuit made of NAND gates with inputs A and B, producing output Y, along with input timing waveforms marked t1, t2, t3, t4, t5 and t6.
  • A
    Output waveform option A with time markers t1, t2, t3, t4, t5 and t6, showing a high level only between early time markers and low elsewhere.
  • B
    Output waveform option B with time markers t1, t2, t3, t4, t5 and t6, showing the signal high initially and then low for the remaining interval.
  • C
    Output waveform option C with time markers t1, t2, t3, t4, t5 and t6, showing two separate high pulses at the beginning and around t4 to t5.
  • D
    Output waveform option D with time markers t1, t2, t3, t4, t5 and t6, showing high output in the first interval, low in the middle, and high again afterward.

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